The Architecture of Logic

LogiSketch is a reactive system that synchronizes human-readable equations with mathematical truth tables and directed acyclic graphs (DAGs).

01. Recursive Descent Evaluator

The EquationParser.ts utilizes a top-down recursive descent approach. Rather than constructing a persistent Abstract Syntax Tree (AST), the parser acts as an evaluator parameterized by a variable scope.

This enables highly efficient truth-table generation by directly computing Boolean results for each variable assignment without the overhead of additional memory allocation.

  • Expression (OR): Lowest precedence, handles +.
  • Term (AND): Middle precedence, handles implicit multiplication (e.g., AB).
  • Factor (NOT/Atom): Highest precedence, handles ', constants 0/1, and variables (A–E).
function parseTerm(): boolean {
  let left = parseFactor();
  // Continues until a lower-precedence 
  // delimiter (+ or )) is encountered.
  while (peek() !== '+' && peek() !== ')') {
    const right = parseFactor();
    left = left && right; // Logical Conjunction
  }
  return left;
}

02. Boolean Reduction (QMC)

To ensure the generated circuit is optimized, LogiSketch implements the Quine-McCluskey Algorithm. This process finds the minimum Sum-of-Products (SOP) form by merging minterms that differ by a single bit.

2n
Identify Minterms
Gray
Hamming Distance Check
SOP
Minimal Prime Implicants

"The algorithm iteratively identifies prime implicants by replacing differing bits with dashes. For example, 110 and111 merge into11-, representing the term AB independent ofC."

03. Two-Way Binding

LogiSketch features Bidirectional Reactivity. The state remains consistent whether you modify the logic from the equation or the table:

Top-Down Flow

Parsing an equation evaluates it against the2ⁿtruth table rows, reflecting the new logic across the entire grid.

Bottom-Up Flow

Toggling a cell triggers the QMC reduction to synthesize the simplest possible equation matching that specific output pattern.

04. Universal Logic Synthesis

The prime implicants are transformed into a Directed Acyclic Graph (DAG). LogiSketch applies De Morgan's Laws to handle functional completeness in NAND/NOR modes:

NAND
Standard AND-OR logic is synthesized as NAND-NAND, utilizing double negation to maintain equivalence.
NOR
Uses the OR-AND dual form, optimized via shared inverters to minimize total gate count.

05. Schematic Routing Engine

Unlike standard graphing libraries that use shortest-path curves, LogiSketch implements a custom Trunk-Logic Router.

This system mimics professional engineering schematics by forcing dedicated vertical "buses" for power and ground rails, preventing the "spaghetti code" visual common in auto-generated graphs.

Routing Strategy

  • POWER_LANE_X = 100px
  • GND_LANE_X = 160px
  • INPUTS_X = 240px

*Wires adhere strictly to these coordinates to form clean, readable trunks.

// Force vertical alignment
const centerX = laneX !== undefined 
  ? laneX 
  : (sourceX + targetX) / 2;

// Draw path with sharp corners
const [edgePath] = getSmoothStepPath({
  sourceX, sourceY,
  targetX, targetY,
  borderRadius: 0, 
  centerX, 
});